Sigrity ™ SystemSI ™

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SystemSI Sigrity ™ SystemSI ™

Sigrity ™ SystemSI ™는 포괄적이고 자동화된 signal integrity 환경을 위한 고속 chip-to-chip system design의 정밀한 평가를 수행하며, 강력한 Parallel Bus와 Serial Link 호환 환경을 제공합니다. Parallel Bus analysis는 source-synchronous design을 목표로 하고, Serial Link analysis는 SerDes channel project와 같은 고속신호전송선로분석에 초점을 맞추고 있습니다. SystemSI는 아주 시스템의 구성을 쉽게 할 수 있도록 block-based schematic editor를 포함하고 있으며, 강력한 Parallel Bus 및 Serial Link 인터페이스 구현을 보장하기 위해 주파수영역, 시간영역, 통계적 분석 방법이 포함되어있습니다.


  • :: Key Benefits
    • Fast and precise simulations for designs at frequencies that range from DC to 10+ gigahertz
    • Accurate handling of non-ideal power delivery system influences on SI, which can be the dominant cause of reliability problems
    • Easy-to-use graphic editor including a novel net-based, block-wise schematic editor
    • Proven S-parameter handling to ensure accurate system-level time domain simulations
    • Related Cadence tools support model extraction, tuning, conversion, and hook-up
    • SPICE subcircuit-based modeling approach supporting common formats such as IBIS, HSPICE, Touchstone, BNP, and MCP
    • Highly automated measurement and reporting capabilities
  • :: Major Features
    • SystemSI Parallel Bus Analysis
    • SystemSI Serial Link Analysis